文献类型：期刊文献

英文题名：Reversible synthesis with minimum logic function

作者：Guan, Zhijin[1,2]; Qin, Xiao Lin[1]; Ge, Ziming[3]; Zhang, Yiqing[4]

机构：[1] College of Infomation Sci. and Tech., Nanjing University of Aeronautics and Astronautics, Nanjing, 210016, China; [2] Nantong University, Nantong, 226007, China; [3] College of Science, East China University of Science and Technology, Shanghai 200237, China; [4] College of Science, Nantong University, Nantong, 226004, China

年份：2006

卷号：2

起止页码：968

外文期刊名：2006 International Conference on Computational Intelligence and Security, ICCIAS 2006

收录：EI(收录号：20080711099388)

语种：英文

外文关键词：Algorithms - Functions - Logic gates - Optimization

摘要：A first practical logic function reversible synthesis method has been presented. In this method, minimizing a standard logic function for obtained a SOP of optimization in our approach previously. This efficient conversion between SOP and fixed polarity Reed-Muller (FPRM) forms. The results show that the algorithm is efficient in terms of time and space. We were also proposed the synthesis algorithm for reversible functions. It uses Fixed Polarity Reed-Muller decomposition at each stage to synthesize the function as a network of Toffoli gates. Some examples of NCMC benchmarks with a large number of variables were presented to demonstrate the suitability of the algorithm for synthesizing complex functions. ? 2006 IEEE.