文献类型：期刊文献

英文题名：LED Chip Defect Detection Method Based on a Hybrid Algorithm

作者：Zheng, Pengfei[1,2,3];Lou, Jingjing[1];Wan, Xiyuan[1];Luo, Qingdong[1];Li, Yunhan[4];Xie, Linsheng[2];Zhu, Zegang[5]

机构：[1]Yiwu Ind & Commercial Coll, Sch Mech Informat, Yiwu 322000, Peoples R China;[2]East China Univ Sci & Technol, Sch Mech & Power Engn, Shanghai 200237, Peoples R China;[3]Zhejiang Prov Key Lab Third Generat Semicond Mat &, Yiwu 322000, Peoples R China;[4]Huzhou Coll, Sch Intelligent Mfg, Huzhou 313000, Peoples R China;[5]Jinhua Acad Agr Sci, Jinhua 321000, Peoples R China

年份：2023

卷号：2023

外文期刊名：INTERNATIONAL JOURNAL OF INTELLIGENT SYSTEMS

收录：;EI(收录号：20234615056086);WOS:【SCI-EXPANDED(收录号:WOS:000943690800007)】；

基金：This study was supported by the Special Project of Scientific Research and Development Center of Higher Education Institutions, Ministry of Education, China (Grant no. ZJXF2022126), the New Product Pilot Program Projects of Zhejiang Province in 2022 (the second batch), China (Grant nos. 2022D60SA7020371 and 2022D60SA7017931), the Public Welfare Science and Technology Research Project of Jinhua, Zhejiang Province, China (Grant no. 2022-4-302), and the Ywicc Special Interest Group on Machine Vision (YSIGMV).

语种：英文

外文关键词：Convolution - Convolutional neural networks - Defects - Energy conservation - Geometry - Image processing - Light emitting diodes - Neural network models - Quality control - Screening

摘要：LED is an extremely important energy-saving lighting products, which has greatly facilitated human life. Meanwhile, it also makes a positive contribution to global carbon neutrality and carbon peaking. Defect detection is a vital part of the production process to control the quality of LED chips. The traditional methods use a microscope for manual visual inspection, which is time-consuming and has inconsistent testing standards, low efficiency, and other deficiencies. To solve these problems, a hybrid algorithm based on geometric computation and a convolutional neural network is proposed for LED chip defect detection. The method takes advantage of the dimensionality reduction of geometric computation to perform coarse detection of defects on preprocessed chip lithography graphs in the form of grid segmentation, which realizes fast coarse screening of large-scale chip samples and reduces postcomputational costs. The convolutional neural network model is used for the secondary fine detection of "suspected defective" chips after geometric coarse screening, and the SPP (spatial pyramid pooling) network model is improved by directly introducing the original feature map into the SPP pooling layer for summation to enhance the global and local feature information of the output feature map. Furthermore, we construct an LED chip image acquisition platform using a high-frequency multimagnification zoom lens, collect training samples of defective chips, and increase the number of samples through image processing techniques. The research introduces the R-CNN, SDD, and YOLO methods to evaluate the superiority of our method in a number of experiments. The experimental results show that our algorithm proposed in this paper has an average precision (AP) of 96.7% for large-scale chip detection with a low defect rate. Compared with other methods, the testing mean average precision (mAP) is 10.39% higher than traditional YOLO v2. The testing mIoU is also 3.63% higher than traditional YOLO v5, the detection speed is also significantly improved, and it has good robustness.