文献类型：期刊文献

英文题名：Heterogeneous complementary field-effect transistors based on silicon and molybdenum disulfide

作者：Tong, Ling[1];Wan, Jing[2];Xiao, Kai[2];Liu, Jian[2];Ma, Jingyi[1];Guo, Xiaojiao[1];Zhou, Lihui[3];Chen, Xinyu[1];Xia, Yin[1];Dai, Sheng[3];Xu, Zihan[4];Bao, Wenzhong[1];Zhou, Peng[1]

机构：[1]Fudan Univ, State Key Lab ASIC & Syst, Shanghai, Peoples R China;[2]Fudan Univ, Sch Informat Sci & Technol, Shanghai, Peoples R China;[3]East China Univ Sci & Technol, Inst Fine Chem, Sch Chem & Mol Engn, Key Lab Adv Mat, Shanghai, Peoples R China;[4]Six Caron Technol Ltd, Shenzhen, Peoples R China

年份：2023

卷号：6

期号：1

起止页码：37

外文期刊名：NATURE ELECTRONICS

收录：;EI(收录号：20225013236241);WOS:【SCI-EXPANDED(收录号:WOS:000895637900002)】；

基金：We acknowledge financial support from the National Key R&D Program of China (No. 2021YFA1200500), the Innovation Program of Shanghai Municipal Education Commission (no. 2021-01-07-00-07-E00077), the Shanghai Municipal Science and Technology Commission (no. 1DZ1100900), the Shanghai Science and Technology Commission `Explorer Project' under Grant 21TS1401300, Guangdong Province Research and Development in Key Fields from Guangdong Greater Bay Area Institute of Integrated Circuit and System(No.2021B0101280002) and Guangzhou City Research and Development Program in Key Field (No.20210302001). We also thank the support by the young scientist project of the MOE innovation platform.

语种：英文

外文关键词：Aspect ratio - Budget control - Field effect transistors - Gain measurement - Hole mobility - Layered semiconductors - Silicon compounds - Silicon on insulator technology

摘要：Complementary field-effect transistors-which have n-type and p-type field-effect transistors (FETs) vertically stacked on top of each other-can boost area efficiency in integrated circuits. However, silicon-based complementary FETs suffer from several issues, including difficulty in balancing electron and hole mobility. Here we report heterogeneous complementary FETs that combine p-type FETs made with silicon-on-insulator technology and n-type FETs made with two-dimensional molybdenum disulfide (MoS2). Through mobility matching and multiple-gate modulation of the MoS2, the mobility mismatch issue of fully silicon-based systems can be addressed. Our integration approach leverages the maturity of the silicon process, the low thermal budget of MoS2 and the low aspect ratio of the device structures to reduce process complexity and device degradation. We use the approach to create a complementary FET inverter that exhibits a voltage gain of 142.3 at a supply voltage of 3 V, and a voltage gain of 1.2 and power consumption of 64 pW at a supply voltage of 100 mV. We also develop a four-inch fabrication process for the silicon-two-dimensional complementary FETs.