文献类型：会议论文

英文题名：Reversible synthesis with minimum logic function

作者：Guan, Zhijin[1,4];Qin, Xiaolin[1];Ge, Ziming[2];Zhang, Yiqing[3]

机构：[1]Nanjing Univ Aeronaut & Astronaut, Coll Informat Sci & Tech, Nanjing 210016, Peoples R China;[2]East China Univ Sci & Technol, Coll Sci, Shanghai 200237, Peoples R China;[3]Nantong Univ, Coll Sci, Nantong 226004, Jiangsu, Peoples R China;[4]Nantong Univ, Nantong 226007, Peoples R China

会议论文集：International Conference on Computational-Intelligence and Security

会议日期：NOV 03-06, 2006

会议地点：Guangzhou, PEOPLES R CHINA

语种：英文

摘要：A first practical logic function reversible synthesis method has been presented. In this method, minimizing a standard logic function for obtained a SOP of optimization in our approach previously. This efficient conversion between SOP and fixed polarity Reed-Muller (FPRM) forms. The results show that the algorithm is efficient in terms of time and space. We were also proposed the synthesis algorithm for reversible functions. It uses Fixed Polarity Reed-Muller decomposition at each stage to synthesize the function as a network of Toffoli gates. Some examples of NCMC benchmarks with a large number of variables were presented to demonstrate the suitability of the algorithm for synthesizing complex functions.