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Automatic Identification of Printed Circuit Board Vias based on YOLO Algorithm  ( EI收录)  

文献类型:期刊文献

英文题名:Automatic Identification of Printed Circuit Board Vias based on YOLO Algorithm

作者:Ji, Jie[1]; Wang, Bei[1]; Huang, Jianming[2]; Tang, Yuezhong[2]

机构:[1] School of Information Science and Engineering, East China University of Science and Technology, Shanghai, 200237, China; [2] Austria Technologie and Systemtechnik Aktiengsellchaft [AT and S], Shanghai, 201108, China

年份:2022

外文期刊名:Proceedings - 2022 15th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2022

收录:EI(收录号:20230313390421)

语种:英文

外文关键词:Automation - Integrated circuit manufacture - Printed circuit design - Timing circuits

摘要:As the core component of small electronic products, the Printed Circuit Board (PCB) is of multi-layer structure to ensure complex circuit design. In a multi-layer PCB, the electrical signals between the layers are transmitted through the vias. Accordingly, the quality of vias would be highly related to the signal integrity of the PCB. In this study, an automatic via identification model based on YOLO algorithm is developed. The objective is to help engineers quickly locate the via on the section image of a multi-layer PCB which is necessary for subsequent processing. For four kinds of vias, the presented identification model can not only ensure reasonable recognition results (89% mAP), but also a high processing speed (26FPS). It has practical application prospects in PCB manufacturing process. ? 2022 IEEE.

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